diff --git a/app/comparacao/page.jsx b/app/comparacao/page.jsx index 84a87c9..0fedfb2 100644 --- a/app/comparacao/page.jsx +++ b/app/comparacao/page.jsx @@ -21,7 +21,8 @@ import { Sliders, Activity, HelpCircle, - Thermometer + Thermometer, + ShieldCheck } from "lucide-react"; // Category to Icon mapping @@ -32,6 +33,7 @@ const categoryIcons = { "Memória": , "Periféricos Digitais": , "Periféricos Analógicos": , + "Segurança": , "Interfaces Especiais": , "Especificações Ambientais": , }; @@ -108,6 +110,9 @@ export default function Comparacao() { { key: "sensor_hall", label: "Sensor Hall" }, { key: "sensor_temperatura", label: "Sensor de Temperatura" }, ]}, + { category: "Segurança", fields: [ + { key: "aceleradores_cripto", label: "Aceleradores Criptográficos" }, + ]}, { category: "Interfaces Especiais", fields: [ { key: "lcd", label: "LCD" }, { key: "camera", label: "Câmera" }, @@ -339,15 +344,21 @@ export default function Comparacao() { - - Datasheet Oficial - - + {seriesItem.datasheet ? ( + + Datasheet Oficial + + + ) : ( + + Datasheet ainda não publicado + + )} ); })} diff --git a/app/glossario/page.jsx b/app/glossario/page.jsx index 6178c3a..767e682 100644 --- a/app/glossario/page.jsx +++ b/app/glossario/page.jsx @@ -39,6 +39,11 @@ export default function Glossario() { definicao: "Hardware dedicado para acelerar operações de inteligência artificial e redes neurais.", exemplo: "ESP32-P4 possui Vector Extension para processamento de IA.", }, + { + termo: "Aceleradores Criptográficos", + definicao: "Blocos de hardware dedicados que executam algoritmos de criptografia (AES, SHA, RSA, ECC/ECDSA, HMAC) muito mais rápido e com menor consumo do que a CPU, além de sustentarem recursos como Secure Boot, criptografia de flash e assinatura digital.", + exemplo: "ESP32-C5 e ESP32-P4 incluem AES, SHA, RSA, ECC/ECDSA e Key Manager para provisionamento seguro de chaves.", + }, ], }, { diff --git a/app/seletor/page.jsx b/app/seletor/page.jsx index b0240b4..3dc52b5 100644 --- a/app/seletor/page.jsx +++ b/app/seletor/page.jsx @@ -32,7 +32,8 @@ import { ShoppingBag, BookOpen, Compass, - Smartphone + Smartphone, + ShieldCheck } from "lucide-react"; // Dynamic icon mapper to convert choices to sleek Lucide vectors @@ -67,6 +68,10 @@ const iconMap = { // IA "ai_ai-ml": , "ai_standard": , + + // Segurança + "security_critical": , + "security_standard": , }; const getOptionIcon = (questionId, value) => { @@ -83,6 +88,7 @@ export default function Seletor() { power: null, hardware: null, ai: null, + security: null, }); const [showResults, setShowResults] = useState(false); const [showSummary, setShowSummary] = useState(false); @@ -138,6 +144,15 @@ export default function Seletor() { { value: "ai-ml", label: "Sim, preciso rodar modelos de IA localmente", icon: "ai_ai-ml" }, { value: "standard", label: "Não, processamento lógico comum é suficiente", icon: "ai_standard" }, ] + }, + { + id: "security", + question: "Qual o nível de segurança criptográfica exigido pelo produto?", + description: "Aceleradores criptográficos no silício executam AES, SHA, RSA e curvas elípticas em hardware, viabilizando Secure Boot, criptografia de flash e provisionamento seguro de chaves sem penalizar a CPU.", + options: [ + { value: "critical", label: "Crítico (Matter, pagamentos, provisionamento seguro de chaves)", icon: "security_critical" }, + { value: "standard", label: "Padrão (TLS comum e projetos sem requisitos regulatórios)", icon: "security_standard" }, + ] } ]; @@ -168,6 +183,7 @@ export default function Seletor() { power: null, hardware: null, ai: null, + security: null, }); }; @@ -354,6 +370,27 @@ export default function Seletor() { } else if (answers.ai === "standard") { scores[key] += 5; } + + // 6. SEGURANÇA CRIPTOGRÁFICA (security) + if (answers.security === "critical") { + const cripto = serie.aceleradores_cripto || ""; + + if (cripto.includes("Key Manager")) { + scores[key] += 30; + reasons[key].push("Suíte criptográfica completa em hardware com Key Manager (provisionamento e uso de chaves sem exposição ao firmware)"); + } else if (cripto.includes("ECDSA")) { + scores[key] += 20; + reasons[key].push("Aceleradores criptográficos com ECC/ECDSA dedicados (assinatura digital e Secure Boot eficientes)"); + } else if (cripto) { + scores[key] += 10; + reasons[key].push("Aceleradores criptográficos básicos em hardware (AES, SHA, Secure Boot e criptografia de flash)"); + } else { + scores[key] -= 20; + reasons[key].push("Sem aceleração criptográfica dedicada: operações de segurança ficam a cargo da CPU"); + } + } else if (answers.security === "standard") { + scores[key] += 5; + } }); return { scores, reasons }; @@ -397,7 +434,7 @@ export default function Seletor() {

- Responda a **5 perguntas simples** sobre o propósito, conexões de hardware e fonte de alimentação do seu projeto e encontre instantaneamente o silício Espressif perfeito para sua bancada. + Responda a **6 perguntas simples** sobre o propósito, conexões de hardware, alimentação e segurança do seu projeto e encontre instantaneamente o silício Espressif perfeito para sua bancada.

diff --git a/app/series/[key]/page.jsx b/app/series/[key]/page.jsx index 5e80660..9b3eb20 100644 --- a/app/series/[key]/page.jsx +++ b/app/series/[key]/page.jsx @@ -39,7 +39,9 @@ import { Folder, Thermometer, ChevronRight, - Lightbulb + Lightbulb, + ShieldCheck, + KeyRound } from "lucide-react"; export default async function SerieDetail({ params }) { @@ -70,6 +72,11 @@ export default async function SerieDetail({ params }) { { label: "Aceleradores IA", value: serie.aceleradores_ia || "Não", icon: }, ]; + const segurancaSpecs = [ + { label: "Aceleradores Criptográficos", value: serie.aceleradores_cripto || "Não", icon: }, + { label: "Gerador de Números Aleatórios", value: serie.aceleradores_cripto ? "Sim (RNG por hardware)" : "Não", icon: }, + ]; + const conectividadeSpecs = [ { label: "Wi-Fi", value: serie.wifi || "Não", icon: }, { label: "Bluetooth", value: serie.bluetooth || "Não", icon: }, @@ -249,15 +256,22 @@ export default async function SerieDetail({ params }) { {/* Links Block */} @@ -326,6 +352,7 @@ export default async function SerieDetail({ params }) {
} /> } /> + } /> } /> {/* Power Consumption section */} diff --git a/app/series/page.jsx b/app/series/page.jsx index a36d1f3..6076314 100644 --- a/app/series/page.jsx +++ b/app/series/page.jsx @@ -15,7 +15,9 @@ import { Home, ArrowRight, Scale, - Compass + Compass, + ShieldCheck, + AlertTriangle } from "lucide-react"; export default function Series() { @@ -158,7 +160,7 @@ export default function Series() {
- {/* IA / Matter Badges & Action Footer */} + {/* IA / Cripto / Matter Badges & Action Footer */}
{serie.aceleradores_ia && ( @@ -168,6 +170,20 @@ export default function Series() { )} + {serie.status_documentacao && ( + + + Doc. Preliminar + + )} + + {serie.aceleradores_cripto && ( + + + Cripto por Hardware + + )} + {serie.matter === "Sim" && ( diff --git a/graphify-out/.graphify_labels.json b/graphify-out/.graphify_labels.json index 258f6eb..b79931e 100644 --- a/graphify-out/.graphify_labels.json +++ b/graphify-out/.graphify_labels.json @@ -75,5 +75,6 @@ "73": "Séries ESP32", "74": "Tailwind CSS 4", "75": "Projeto não oficial (sem afiliação Espressif)", - "76": "Deploy na Vercel" + "76": "Deploy na Vercel", + "77": "micropython.py" } diff --git a/graphify-out/2026-08-20/.graphify_labels.json b/graphify-out/2026-08-20/.graphify_labels.json new file mode 100644 index 0000000..258f6eb --- /dev/null +++ b/graphify-out/2026-08-20/.graphify_labels.json @@ -0,0 +1,79 @@ +{ + "0": "Next.js App Pages", + "1": "ESP32 Original SoC Silicon", + "2": "Xtensa DevKit Board Diagrams", + "3": "Layout and Marketplace API", + "4": "ESP32-C2 DevKit and Branding", + "5": "C6/C61 Wi-Fi 6 DevKits", + "6": "Lint and Build Tooling", + "7": "ESP32-C61 Silicon Subsystems", + "8": "ESP32-C3 Silicon Subsystems", + "9": "ESP32-C5 Silicon Subsystems", + "10": "ESP32-H2 Silicon Subsystems", + "11": "ESPDocs Site Content Pillars", + "12": "ESP32-C6 Silicon Subsystems", + "13": "ESP32-P4 Silicon Subsystems", + "14": "ESP32-S3 Silicon Subsystems", + "15": "ESP32-S2 Silicon Subsystems", + "16": "ESP32-C2 Silicon Subsystems", + "17": "Classic Wi-Fi and BLE Radios", + "18": "Modern BLE and Wi-Fi 6 Radios", + "19": "802.15.4 Thread and Zigbee", + "20": "P4 Camera and Video Pipeline", + "21": "CPU Cores and SIMD Extensions", + "22": "JS Path Aliases", + "23": "ESP-Matter Code Example", + "24": "Shared GDMA Controllers", + "25": "RISC-V Core Speed Variants", + "26": "Secure Boot (Xtensa Family)", + "27": "Thread 1.4 Zigbee Radio", + "28": "Bluetooth LE 5.3 Variants", + "29": "RISC-V Core Clock Variants", + "30": "Secure Boot (RISC-V Family)", + "31": "ESP-NN Code Example", + "32": "ESP-WHO Code Example", + "33": "Next.js Config", + "34": "PostCSS Config", + "35": "TEE and Permission Control", + "36": "ESP-ADF Code Example", + "37": "ESP-DSP Code Example", + "38": "ESP-IDF Code Example", + "39": "MicroPython Example", + "40": "Start Config Script", + "41": "eslint.config.mjs", + "42": "page.jsx", + "43": "page.jsx", + "44": "ConnectionsDiagram.jsx", + "45": "page.jsx", + "46": "page.jsx", + "47": "page.jsx", + "48": "Header.jsx", + "49": "route.js", + "50": "page.jsx", + "51": "page.jsx", + "52": "page.jsx", + "53": "page.jsx", + "54": "CLAUDE.md", + "55": "BoardCard.jsx", + "56": "CodeExample.jsx", + "57": "Footer.jsx", + "58": "Providers.jsx", + "59": "SeriesTabMenu.jsx", + "60": "Crypto Accelerators (AES, SHA, RSA, ECC, HMAC, RNG)", + "61": "API do Marketplace (app/api/placas/route.js)", + "62": "Comparação de Séries", + "63": "Diagramas Interativos de Conexões", + "64": "Exemplos de Código", + "65": "Frameworks ESP32 (ESP-IDF, Arduino, MicroPython)", + "66": "Google Sheets API Integration", + "67": "GOOGLE_SHEETS_API_KEY env var", + "68": "Marketplace de Placas (Catálogo)", + "69": "Material-UI", + "70": "Licença MIT", + "71": "Next.js 15 App Router", + "72": "React 19", + "73": "Séries ESP32", + "74": "Tailwind CSS 4", + "75": "Projeto não oficial (sem afiliação Espressif)", + "76": "Deploy na Vercel" +} diff --git a/graphify-out/2026-08-20/GRAPH_REPORT.md b/graphify-out/2026-08-20/GRAPH_REPORT.md new file mode 100644 index 0000000..86b2684 --- /dev/null +++ b/graphify-out/2026-08-20/GRAPH_REPORT.md @@ -0,0 +1,288 @@ +# Graph Report - espdocs (2026-07-14) + +## Corpus Check +- 47 files · ~535,253 words +- Verdict: corpus is large enough that graph structure adds value. + +## Summary +- 510 nodes · 554 edges · 77 communities (53 shown, 24 thin omitted) +- Extraction: 81% EXTRACTED · 19% INFERRED · 0% AMBIGUOUS · INFERRED: 104 edges (avg confidence: 0.87) +- Token cost: 0 input · 0 output + +## Graph Freshness +- Built from commit: `de4abf7c` +- Run `git rev-parse HEAD` and compare to check if the graph is stale. +- Run `graphify update .` after code changes (no API cost). + +## Community Hubs (Navigation) +- ESP32 Original SoC Silicon +- Xtensa DevKit Board Diagrams +- Layout and Marketplace API +- ESP32-C2 DevKit and Branding +- C6/C61 Wi-Fi 6 DevKits +- Lint and Build Tooling +- ESP32-C61 Silicon Subsystems +- ESP32-C3 Silicon Subsystems +- ESP32-C5 Silicon Subsystems +- ESP32-H2 Silicon Subsystems +- ESPDocs Site Content Pillars +- ESP32-C6 Silicon Subsystems +- ESP32-P4 Silicon Subsystems +- ESP32-S3 Silicon Subsystems +- ESP32-S2 Silicon Subsystems +- ESP32-C2 Silicon Subsystems +- Classic Wi-Fi and BLE Radios +- Modern BLE and Wi-Fi 6 Radios +- 802.15.4 Thread and Zigbee +- P4 Camera and Video Pipeline +- CPU Cores and SIMD Extensions +- JS Path Aliases +- ESP-Matter Code Example +- Shared GDMA Controllers +- RISC-V Core Speed Variants +- Secure Boot (Xtensa Family) +- Thread 1.4 Zigbee Radio +- Bluetooth LE 5.3 Variants +- RISC-V Core Clock Variants +- Secure Boot (RISC-V Family) +- ESP-NN Code Example +- Next.js Config +- PostCSS Config +- TEE and Permission Control +- eslint.config.mjs +- page.jsx +- ConnectionsDiagram.jsx +- page.jsx +- page.jsx +- CLAUDE.md +- Crypto Accelerators (AES, SHA, RSA, ECC, HMAC, RNG) +- API do Marketplace (app/api/placas/route.js) +- Comparação de Séries +- Diagramas Interativos de Conexões +- Exemplos de Código +- Frameworks ESP32 (ESP-IDF, Arduino, MicroPython) +- Google Sheets API Integration +- GOOGLE_SHEETS_API_KEY env var +- Marketplace de Placas (Catálogo) +- Material-UI +- Licença MIT +- Next.js 15 App Router +- React 19 +- Séries ESP32 +- Tailwind CSS 4 +- Projeto não oficial (sem afiliação Espressif) +- Deploy na Vercel + +## God Nodes (most connected - your core abstractions) +1. `ESP32-C5 Series` - 28 edges +2. `ESP32-S31 SoC` - 25 edges +3. `ESP32-C6 SoC` - 23 edges +4. `ESP32-H2 SoC` - 23 edges +5. `ESP32-S3 Series SoC` - 23 edges +6. `ESP32-C3 Series` - 21 edges +7. `ESP32-C61 SoC` - 21 edges +8. `ESP32-P4 Series SoC` - 21 edges +9. `ESP8684 Series (ESP32-C2)` - 17 edges +10. `ESP32-S2 Series SoC` - 17 edges + +## Surprising Connections (you probably didn't know these) +- `Google Site Verification Token` --conceptually_related_to--> `ESPDocs - Documentação ESP32 em Português` [AMBIGUOUS] + public/google21a790a2c23c0ec5.html → README.md +- `Crypto Accelerators (AES, SHA, RSA, ECC, HMAC, TRNG)` --semantically_similar_to--> `Crypto Accelerators (SHA, AES, RSA, HMAC, RSA_DS, RNG)` [INFERRED] [semantically similar] + public/datasheets/ESP32-P4.pdf → public/datasheets/ESP32-S3.pdf +- `ULP Coprocessor (ULP-RISC-V, ULP-FSM)` --semantically_similar_to--> `ULP Coprocessor (ULP-RISC-V, ULP-FSM)` [INFERRED] [semantically similar] + public/datasheets/ESP32-S3.pdf → public/datasheets/ESP32-S2.pdf +- `RISC-V 32-bit Single-Core CPU (120 MHz)` --semantically_similar_to--> `RISC-V 32-bit Single-Core CPU (160 MHz)` [INFERRED] [semantically similar] + public/datasheets/ESP32-C2 (ESP8684).pdf → public/datasheets/ESP32-C3.pdf +- `2.4 GHz Wi-Fi (IEEE 802.11b/g/n)` --semantically_similar_to--> `2.4 GHz Wi-Fi (IEEE 802.11b/g/n)` [INFERRED] [semantically similar] + public/datasheets/ESP32-C2 (ESP8684).pdf → public/datasheets/ESP32-C3.pdf + +## Import Cycles +- None detected. + +## Hyperedges (group relationships) +- **Stack frontend do ESPDocs** — readme_nextjs_app_router, readme_react19, readme_tailwind_css, readme_material_ui [EXTRACTED 1.00] +- **Fluxo de dados do Marketplace de Placas** — readme_marketplace_placas, readme_api_placas_route, readme_google_sheets_api, readme_google_sheets_api_key [INFERRED 0.85] +- **Pilares de conteúdo do ESPDocs** — readme_series_esp32, readme_frameworks, readme_comparacao, readme_diagramas_interativos, readme_exemplos_codigo, readme_marketplace_placas [EXTRACTED 1.00] +- **ESP8684 Security Subsystem** — public_datasheets_esp32_c2__esp8684__secure_boot, public_datasheets_esp32_c2__esp8684__flash_encryption, public_datasheets_esp32_c2__esp8684__ecc_accelerator, public_datasheets_esp32_c2__esp8684__sha_accelerator, public_datasheets_esp32_c2__esp8684__rng [EXTRACTED 1.00] +- **ESP32-C3 Security Subsystem** — public_datasheets_esp32_c3_aes_accelerator, public_datasheets_esp32_c3_sha_accelerator, public_datasheets_esp32_c3_rsa_accelerator, public_datasheets_esp32_c3_hmac_digital_signature, public_datasheets_esp32_c3_secure_boot, public_datasheets_esp32_c3_flash_encryption, public_datasheets_esp32_c3_rng [EXTRACTED 1.00] +- **ESP32-C5 Multiprotocol Radio Stack** — public_datasheets_esp32_c5_wi_fi_6_dual_band, public_datasheets_esp32_c5_bluetooth_le_5, public_datasheets_esp32_c5_ieee_802_15_4, public_datasheets_esp32_c5_thread_1_4, public_datasheets_esp32_c5_zigbee_3_0, public_datasheets_esp32_c5_rf_module [EXTRACTED 1.00] +- **ESP32-C6 coexisting multi-protocol radio stack sharing one antenna** — public_datasheets_esp32_c6_wi_fi_6, public_datasheets_esp32_c6_bluetooth_le_5_3, public_datasheets_esp32_c6_ieee_802_15_4, public_datasheets_esp32_c6_rf_module [EXTRACTED 1.00] +- **ESP32-C61 security subsystem** — public_datasheets_esp32_c61_secure_boot, public_datasheets_esp32_c61_flash_psram_encryption, public_datasheets_esp32_c61_ecdsa, public_datasheets_esp32_c61_trng, public_datasheets_esp32_c61_apm, public_datasheets_esp32_c61_power_glitch_detector [EXTRACTED 1.00] +- **ESP32-H2 802.15.4 application-layer protocols** — public_datasheets_esp32_h2_ieee_802_15_4, public_datasheets_esp32_h2_thread, public_datasheets_esp32_h2_zigbee_3_0, public_datasheets_esp32_h2_matter [EXTRACTED 1.00] +- **ESP32-P4 Image and Voice Processing Pipeline** — public_datasheets_esp32_p4_isp, public_datasheets_esp32_p4_jpeg_codec, public_datasheets_esp32_p4_ppa, public_datasheets_esp32_p4_h264_encoder, public_datasheets_esp32_p4_mipi_csi, public_datasheets_esp32_p4_mipi_dsi, public_datasheets_esp32_p4_vad [EXTRACTED 1.00] +- **ESP32-S3 Wireless Subsystem (Wi-Fi + BLE + RF)** — public_datasheets_esp32_s3_wifi, public_datasheets_esp32_s3_wifi_mac_baseband, public_datasheets_esp32_s3_bluetooth_le, public_datasheets_esp32_s3_ble_baseband, public_datasheets_esp32_s3_rf_module [EXTRACTED 1.00] +- **Common Espressif Security Feature Family** — public_datasheets_esp32_p4_secure_boot, public_datasheets_esp32_s2_secure_boot, public_datasheets_esp32_s3_secure_boot, public_datasheets_esp32_s2_flash_encryption, public_datasheets_esp32_s3_flash_encryption, public_datasheets_esp32_p4_xts_aes [INFERRED 0.85] +- **ESP32-S31 Multiprotocol Wireless Stack** — public_datasheets_esp32_s31_wifi6, public_datasheets_esp32_s31_bluetooth_54_le, public_datasheets_esp32_s31_bluetooth_classic, public_datasheets_esp32_s31_ieee_802154 [EXTRACTED 1.00] +- **ESP32-S31 Security Subsystem** — public_datasheets_esp32_s31_secure_boot, public_datasheets_esp32_s31_flash_psram_encryption, public_datasheets_esp32_s31_crypto_accelerators, public_datasheets_esp32_s31_huk_key_manager [EXTRACTED 1.00] +- **ESP32 RTC Low-Power Domain** — public_datasheets_esp32_rtc, public_datasheets_esp32_pmu, public_datasheets_esp32_ulp_coprocessor, public_datasheets_esp32_rtc_memory [EXTRACTED 1.00] +- **Common DevKit Hardware Controls (Buttons, USB, LED)** — public_placas_esp32_c2_boot_rst_buttons, public_placas_esp32_c3_boot_rst_buttons, public_placas_esp32_c5_reset_boot_buttons, public_placas_esp32_c2_micro_usb_port, public_placas_esp32_c3_micro_usb_port, public_placas_esp32_c5_dual_usb_c_ports [INFERRED 0.75] +- **Espressif DevKit Pinout Diagram Family (C2/C3/C5)** — public_placas_esp32_c2_devkit_pinout, public_placas_esp32_c3_devkit_pinout, public_placas_esp32_c5_devkit_pinout, public_placas_esp32_c5_espressif_branding [INFERRED 0.95] +- **RISC-V Single-Core Wireless SoC Spec Family** — public_placas_esp32_c2_specs, public_placas_esp32_c3_specs, public_placas_esp32_c5_specs [INFERRED 0.85] +- **Espressif RISC-V DevKit Board Diagrams** — public_placas_esp32_c6_board, public_placas_esp32_c61_board, public_placas_esp32_h2_board, public_placas_esp32_p4_board [INFERRED 0.85] +- **Common DevKit Programming/Flashing Interface** — public_placas_esp32_c6_reset_boot_buttons, public_placas_esp32_c61_reset_boot_buttons, public_placas_esp32_p4_reset_boot_buttons, public_placas_esp32_c6_usb_uart_ports [INFERRED 0.75] +- **ESP32-P4 EV Board Multimedia and Connectivity Peripherals** — public_placas_esp32_p4_mipi_dsi_csi, public_placas_esp32_p4_audio_subsystem, public_placas_esp32_p4_ethernet, public_placas_esp32_p4_usb_ports [EXTRACTED 1.00] +- **ESP32-S31 Audio Subsystem** — public_placas_esp32_s31_audio_codec_chip, public_placas_esp32_s31_microphone, public_placas_esp32_s31_speaker_output_port [INFERRED 0.85] +- **ESP32-S31 Connectivity Ports** — public_placas_esp32_s31_rj45_ethernet_port, public_placas_esp32_s31_usb_type_a_port, public_placas_esp32_s31_usb_serial_jtag_port, public_placas_esp32_s31_usb_type_c_uart_port [INFERRED 0.85] +- **Espressif ESP32 Dev Board Image Gallery** — public_placas_esp32_pinout_diagram, public_placas_esp32_s2_pinout_diagram, public_placas_esp32_s3_pinout_diagram, public_placas_esp32_s31_board_photo [INFERRED 0.85] + +## Communities (77 total, 24 thin omitted) + +### Community 1 - "ESP32 Original SoC Silicon" +Cohesion: 0.06 +Nodes (46): Bluetooth v4.2 BR/EDR and LE Dual Mode, ESP32 SoC, Cryptographic Hardware Acceleration (AES, SHA-2, RSA, RNG), 8-bit DAC, Ethernet MAC with IEEE 1588, Flash Encryption, Power Management Unit / Power Modes, 448 KB ROM (+38 more) + +### Community 2 - "Xtensa DevKit Board Diagrams" +Cohesion: 0.09 +Nodes (31): ESP32 CP2102 USB-UART Bridge, ESP32 EN and Boot Buttons, ESP32 Micro-USB Port, ESP32-DevKitC Pinout Diagram, ESP32-S2 BOOT and RESET Buttons, ESP32-S2-DevKitC-1 Pinout Diagram, ESP32-S2 RGB LED @ IO18, ESP32-S2-SOLO Module (+23 more) + +### Community 3 - "Layout and Marketplace API" +Cohesion: 0.09 +Nodes (23): @emotion/react, @emotion/styled, framer-motion, googleapis, lucide-react, @mui/icons-material, @mui/material, next (+15 more) + +### Community 4 - "ESP32-C2 DevKit and Branding" +Cohesion: 0.10 +Nodes (28): Gear + Circuit Traces + Sprouting Plant Motif, Globe and Shield/Clock IoT Icons, ESPDocs Project Logo, Boot and RST Buttons (ESP8684-DevKitM-1), ESP8684-DevKitM-1 Pinout Diagram (ESP32-C2), Dual 2x Pin Header Castellated Layout, Micro-USB Port (ESP8684-DevKitM-1), ESP8684-MINI-1 Module with PCB Antenna (+20 more) + +### Community 5 - "C6/C61 Wi-Fi 6 DevKits" +Cohesion: 0.09 +Nodes (27): ESP32-C61-DevKitC-1 Pinout Diagram, ESP32-C61 RESET and BOOT Buttons, ESP32-C61 Specs: RISC-V 160MHz, Wi-Fi 6, BLE 5, ESP32-C61 UART and USB Type-C Ports, ESP32-C61-WROOM-1 Module, ESP32-C6-DevKitC-1 Pinout Diagram, ESP32-C6 RESET and BOOT Buttons, ESP32-C6 RGB LED on GPIO8 (+19 more) + +### Community 6 - "Lint and Build Tooling" +Cohesion: 0.10 +Nodes (19): eslint, eslint-config-next, @eslint/eslintrc, devDependencies, eslint, eslint-config-next, @eslint/eslintrc, tailwindcss (+11 more) + +### Community 7 - "ESP32-C61 Silicon Subsystems" +Cohesion: 0.10 +Nodes (20): Access Permission Management (APM), Digital Signature - ECDSA, ESP32-C61 SoC, Event Task Matrix (ETM), Flash/PSRAM Encryption (XTS-AES), General DMA Controller (GDMA), L1 Cache 32 KB, Power Management Unit (PMU) (+12 more) + +### Community 8 - "ESP32-C3 Silicon Subsystems" +Cohesion: 0.11 +Nodes (19): AES-128/256 Accelerator (FIPS PUB 197), 4096-bit eFuse Memory, ESP32-C3 Series, Flash Encryption, 22 Programmable GPIOs, HMAC and Digital Signature, Power Management Unit / RTC, QFN32 (5x5 mm) Package (+11 more) + +### Community 9 - "ESP32-C5 Silicon Subsystems" +Cohesion: 0.11 +Nodes (18): APM and TEE Controller, ECDSA Accelerator, ESP32-C5 Series, Event Task Matrix (ETM), External Flash/PSRAM Controller with Cache, 29 GPIOs, HP SRAM 384 KB, Key Manager (+10 more) + +### Community 10 - "ESP32-H2 Silicon Subsystems" +Cohesion: 0.11 +Nodes (18): TEE Controller and Access Permission Management (APM), ESP32-H2 SoC, Event Task Matrix (ETM), Flash Encryption, General DMA Controller (GDMA), 2 MB or 4 MB In-Package Flash, LP Memory 4 KB, Motor Control PWM (MCPWM) (+10 more) + +### Community 11 - "ESPDocs Site Content Pillars" +Cohesion: 0.12 +Nodes (15): Google Site Verification Token, 👤 Autor, Configuração do Marketplace (Opcional), 🤝 Contribuindo, 🚀 Deploy on Vercel, ⚠️ Disclaimer, ESPDocs - Documentação ESP32 em Português, 📁 Estrutura do Projeto (+7 more) + +### Community 12 - "ESP32-C6 Silicon Subsystems" +Cohesion: 0.12 +Nodes (17): Wi-Fi 6 (IEEE 802.11ax, 2.4 GHz), 4096-bit eFuse Memory, ESP32-C6 SoC, Event Task Matrix (ETM), General DMA Controller (GDMA), HP SRAM 512 KB, LP RISC-V 32-bit Processor (20 MHz), LP SRAM 16 KB (+9 more) + +### Community 13 - "ESP32-P4 Silicon Subsystems" +Cohesion: 0.13 +Nodes (17): ESP32-P4 Series SoC, Crypto Accelerators (AES, SHA, RSA, ECC, HMAC, TRNG), ECDSA Digital Signature Peripheral (ECDSA_DS), Ethernet MAC (EMAC), I3C Master and Slave, Key Manager (HUK from SRAM PUF), 768 KB HP L2MEM, RISC-V 32-bit Single-Core LP CPU (40 MHz) (+9 more) + +### Community 14 - "ESP32-S3 Silicon Subsystems" +Cohesion: 0.12 +Nodes (17): GDMA / VDMA / 2D-DMA Controllers, Touch Sensor, USB 2.0 High-Speed OTG, ESP32-S3 Series SoC, 4096-bit eFuse Memory, General DMA Controller (GDMA), L1 Cache, LCD Interface and DVP Camera Interface (+9 more) + +### Community 15 - "ESP32-S2 Silicon Subsystems" +Cohesion: 0.13 +Nodes (16): ESP32-S2 Series SoC, Crypto Accelerators (AES, SHA, RSA, HMAC, RNG, Digital Signature), Two 8-bit DACs, 4096-bit eFuse OTP, Flash Encryption, Power Management Unit and Five Power Modes, 128 KB ROM, RTC Memory (16 KB RTC SRAM) (+8 more) + +### Community 16 - "ESP32-C2 Silicon Subsystems" +Cohesion: 0.13 +Nodes (15): ECC Accelerator, ESP8684 Series (ESP32-C2), Flash Encryption, 14 Programmable GPIOs, In-package Flash (2 MB / 4 MB), Power Management Unit / Deep-sleep, QFN24 (4x4 mm) Package, Random Number Generator (RNG) (+7 more) + +### Community 17 - "Classic Wi-Fi and BLE Radios" +Cohesion: 0.25 +Nodes (8): RF Module (Balun, PA, LNA, RF Synthesizer), 2.4 GHz Wi-Fi (802.11 b/g/n), Wi-Fi MAC and Baseband, Bluetooth LE Baseband and Link Controller, Bluetooth 5 LE and Bluetooth Mesh, RF Module (Balun, PA, LNA, Antenna Switch), 2.4 GHz Wi-Fi (IEEE 802.11 b/g/n), Wi-Fi MAC and Baseband + +### Community 18 - "Modern BLE and Wi-Fi 6 Radios" +Cohesion: 0.38 +Nodes (7): Bluetooth LE 5.3, 2.4 GHz RF Module (Balun, PA, LNA), 2.4 GHz Wi-Fi (IEEE 802.11b/g/n), Bluetooth LE 5 / Bluetooth mesh, 2.4 GHz Wi-Fi (IEEE 802.11b/g/n), Bluetooth LE 5 (Core 6.0) / Bluetooth mesh 1.1, Dual-band Wi-Fi 6 (IEEE 802.11ax, 2.4/5 GHz) + +### Community 19 - "802.15.4 Thread and Zigbee" +Cohesion: 0.38 +Nodes (7): IEEE 802.15.4, Thread 1.3, Zigbee 3.0, IEEE 802.15.4, Matter, Thread, Zigbee 3.0 + +### Community 20 - "P4 Camera and Video Pipeline" +Cohesion: 0.29 +Nodes (7): H264 Encoder, Image Processing Subsystem, Image Signal Processor (ISP), JPEG Codec, MIPI CSI, MIPI DSI, Pixel-Processing Accelerator (PPA) + +### Community 21 - "CPU Cores and SIMD Extensions" +Cohesion: 0.33 +Nodes (6): RISC-V 32-bit Dual-Core HP CPU (400 MHz), Processor Instruction Extensions (SIMD/AI), Xtensa Single-Core 32-bit LX7 Microprocessor (240 MHz), Single Precision Floating Point Unit (FPU), 128-bit Data Bus and Dedicated SIMD Instructions, Xtensa Dual-Core 32-bit LX7 Microprocessor (240 MHz) + +### Community 22 - "JS Path Aliases" +Cohesion: 0.40 +Nodes (4): compilerOptions, paths, @/*, ./* + +### Community 24 - "Shared GDMA Controllers" +Cohesion: 0.67 +Nodes (3): GDMA Controller, GDMA Controller (3 TX / 3 RX), GDMA Controller (3 TX / 3 RX) + +### Community 25 - "RISC-V Core Speed Variants" +Cohesion: 0.67 +Nodes (3): RISC-V 32-bit Single-Core CPU (120 MHz), RISC-V 32-bit Single-Core CPU (160 MHz), HP RISC-V 32-bit Processor (240 MHz) + +### Community 26 - "Secure Boot (Xtensa Family)" +Cohesion: 0.67 +Nodes (3): Secure Boot, Secure Boot, Secure Boot + +### Community 27 - "Thread 1.4 Zigbee Radio" +Cohesion: 0.67 +Nodes (3): IEEE 802.15.4 Radio, Thread 1.4, Zigbee 3.0 + +### Community 28 - "Bluetooth LE 5.3 Variants" +Cohesion: 0.67 +Nodes (3): Bluetooth LE (Core 6.0 certified), Bluetooth LE 5.3, Bluetooth LE 5.3 + +### Community 29 - "RISC-V Core Clock Variants" +Cohesion: 0.67 +Nodes (3): RISC-V 32-bit Single-Core Processor (160 MHz), HP RISC-V 32-bit Processor (160 MHz), RISC-V 32-bit Single-Core Processor (96 MHz) + +### Community 30 - "Secure Boot (RISC-V Family)" +Cohesion: 0.67 +Nodes (3): Secure Boot, Secure Boot, Secure Boot + +### Community 35 - "TEE and Permission Control" +Cohesion: 0.40 +Nodes (3): inter, metadata, outfit + +### Community 41 - "eslint.config.mjs" +Cohesion: 0.40 +Nodes (4): compat, __dirname, eslintConfig, __filename + +### Community 43 - "page.jsx" +Cohesion: 0.67 +Nodes (3): getOptionIcon(), iconMap, Seletor() + +### Community 44 - "ConnectionsDiagram.jsx" +Cohesion: 0.67 +Nodes (3): ConnectionsDiagram(), FILTER_CATEGORIES, type_colors + +## Ambiguous Edges - Review These +- `ESPDocs - Documentação ESP32 em Português` → `Google Site Verification Token` [AMBIGUOUS] + public/google21a790a2c23c0ec5.html · relation: conceptually_related_to + +## Knowledge Gaps +- **225 isolated node(s):** `categoryIcons`, `metadata`, `outfit`, `inter`, `metadata` (+220 more) + These have ≤1 connection - possible missing edges or undocumented components. +- **24 thin communities (<3 nodes) omitted from report** — run `graphify query` to explore isolated nodes. + +## Suggested Questions +_Questions this graph is uniquely positioned to answer:_ + +- **What is the exact relationship between `ESPDocs - Documentação ESP32 em Português` and `Google Site Verification Token`?** + _Edge tagged AMBIGUOUS (relation: conceptually_related_to) - confidence is low._ +- **Why does `ESP32-S3 Series SoC` connect `ESP32-S3 Silicon Subsystems` to `ESP32-P4 Silicon Subsystems`, `ESP32-S2 Silicon Subsystems`, `Classic Wi-Fi and BLE Radios`, `CPU Cores and SIMD Extensions`, `Secure Boot (RISC-V Family)`?** + _High betweenness centrality (0.014) - this node is a cross-community bridge._ +- **Why does `ESP32-C6 SoC` connect `ESP32-C6 Silicon Subsystems` to `ESP32-C61 Silicon Subsystems`, `ESP32-H2 Silicon Subsystems`, `Crypto Accelerators (AES, SHA, RSA, ECC, HMAC, RNG)`, `802.15.4 Thread and Zigbee`, `Bluetooth LE 5.3 Variants`, `RISC-V Core Clock Variants`?** + _High betweenness centrality (0.012) - this node is a cross-community bridge._ +- **Why does `ESP32-P4 Series SoC` connect `ESP32-P4 Silicon Subsystems` to `P4 Camera and Video Pipeline`, `CPU Cores and SIMD Extensions`, `ESP32-S3 Silicon Subsystems`, `Secure Boot (RISC-V Family)`?** + _High betweenness centrality (0.011) - this node is a cross-community bridge._ +- **Are the 2 inferred relationships involving `ESP32-C6 SoC` (e.g. with `ESP32-C61 SoC` and `ESP32-H2 SoC`) actually correct?** + _`ESP32-C6 SoC` has 2 INFERRED edges - model-reasoned connections that need verification._ +- **Are the 2 inferred relationships involving `ESP32-S3 Series SoC` (e.g. with `ESP32-P4 Series SoC` and `ESP32-S2 Series SoC`) actually correct?** + _`ESP32-S3 Series SoC` has 2 INFERRED edges - model-reasoned connections that need verification._ +- **What connects `categoryIcons`, `metadata`, `outfit` to the rest of the system?** + _225 weakly-connected nodes found - possible documentation gaps or missing edges._ \ No newline at end of file diff --git a/graphify-out/2026-08-20/cost.json b/graphify-out/2026-08-20/cost.json new file mode 100644 index 0000000..cc887bd --- /dev/null +++ b/graphify-out/2026-08-20/cost.json @@ -0,0 +1,12 @@ +{ + "runs": [ + { + "date": "2026-07-14T11:40:04.053012+00:00", + "input_tokens": 435411, + "output_tokens": 0, + "files": 70 + } + ], + "total_input_tokens": 435411, + "total_output_tokens": 0 +} \ No newline at end of file diff --git a/graphify-out/2026-08-20/graph.json b/graphify-out/2026-08-20/graph.json new file mode 100644 index 0000000..5b4d244 --- /dev/null +++ b/graphify-out/2026-08-20/graph.json @@ -0,0 +1,12985 @@ +{ + "directed": false, + "multigraph": false, + "graph": { + "hyperedges": [ + { + "id": "espdocs_frontend_stack", + "label": "Stack frontend do ESPDocs", + "nodes": [ + "readme_nextjs_app_router", + "readme_react19", + "readme_tailwind_css", + "readme_material_ui" + ], + "relation": "form", + "confidence": "EXTRACTED", + "confidence_score": 1.0, + "source_file": "README.md" + }, + { + "id": "marketplace_data_flow", + "label": "Fluxo de dados do Marketplace de Placas", + "nodes": [ + "readme_marketplace_placas", + "readme_api_placas_route", + "readme_google_sheets_api", + "readme_google_sheets_api_key" + ], + "relation": "participate_in", + "confidence": "INFERRED", + "confidence_score": 0.85, + "source_file": "README.md" + }, + { + "id": "espdocs_content_pillars", + "label": "Pilares de conte\u00fado do ESPDocs", + "nodes": [ + "readme_series_esp32", + "readme_frameworks", + "readme_comparacao", + "readme_diagramas_interativos", + "readme_exemplos_codigo", + "readme_marketplace_placas" + ], + "relation": "form", + "confidence": "EXTRACTED", + "confidence_score": 1.0, + "source_file": "README.md" + }, + { + "id": "esp8684_security_subsystem", + "label": "ESP8684 Security Subsystem", + "nodes": [ + "public_datasheets_esp32_c2__esp8684__secure_boot", + "public_datasheets_esp32_c2__esp8684__flash_encryption", + "public_datasheets_esp32_c2__esp8684__ecc_accelerator", + "public_datasheets_esp32_c2__esp8684__sha_accelerator", + "public_datasheets_esp32_c2__esp8684__rng" + ], + "relation": "form", + "confidence": "EXTRACTED", + "confidence_score": 1.0, + "source_file": "public/datasheets/ESP32-C2 (ESP8684).pdf" + }, + { + "id": "esp32_c3_security_subsystem", + "label": "ESP32-C3 Security Subsystem", + "nodes": [ + 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ESPDocs (2026-08-20) ## Corpus Check -- 47 files · ~535,253 words +- 47 files · ~536,186 words - Verdict: corpus is large enough that graph structure adds value. ## Summary -- 510 nodes · 554 edges · 77 communities (53 shown, 24 thin omitted) +- 510 nodes · 550 edges · 78 communities (53 shown, 25 thin omitted) - Extraction: 81% EXTRACTED · 19% INFERRED · 0% AMBIGUOUS · INFERRED: 104 edges (avg confidence: 0.87) - Token cost: 0 input · 0 output ## Graph Freshness -- Built from commit: `de4abf7c` +- Built from commit: `b1e76757` - Run `git rev-parse HEAD` and compare to check if the graph is stale. - Run `graphify update .` after code changes (no API cost). @@ -46,15 +46,16 @@ - RISC-V Core Clock Variants - Secure Boot (RISC-V Family) - ESP-NN Code Example +- ESP-WHO Code Example - Next.js Config - PostCSS Config - TEE and Permission Control +- ESP-DSP Code Example - eslint.config.mjs - page.jsx - ConnectionsDiagram.jsx - page.jsx - page.jsx -- CLAUDE.md - Crypto Accelerators (AES, SHA, RSA, ECC, HMAC, RNG) - API do Marketplace (app/api/placas/route.js) - Comparação de Séries @@ -86,8 +87,6 @@ 10. `ESP32-S2 Series SoC` - 17 edges ## Surprising Connections (you probably didn't know these) -- `Google Site Verification Token` --conceptually_related_to--> `ESPDocs - Documentação ESP32 em Português` [AMBIGUOUS] - public/google21a790a2c23c0ec5.html → README.md - `Crypto Accelerators (AES, SHA, RSA, ECC, HMAC, TRNG)` --semantically_similar_to--> `Crypto Accelerators (SHA, AES, RSA, HMAC, RSA_DS, RNG)` [INFERRED] [semantically similar] public/datasheets/ESP32-P4.pdf → public/datasheets/ESP32-S3.pdf - `ULP Coprocessor (ULP-RISC-V, ULP-FSM)` --semantically_similar_to--> `ULP Coprocessor (ULP-RISC-V, ULP-FSM)` [INFERRED] [semantically similar] @@ -96,6 +95,8 @@ public/datasheets/ESP32-C2 (ESP8684).pdf → public/datasheets/ESP32-C3.pdf - `2.4 GHz Wi-Fi (IEEE 802.11b/g/n)` --semantically_similar_to--> `2.4 GHz Wi-Fi (IEEE 802.11b/g/n)` [INFERRED] [semantically similar] public/datasheets/ESP32-C2 (ESP8684).pdf → public/datasheets/ESP32-C3.pdf +- `Bluetooth LE 5.3` --semantically_similar_to--> `Bluetooth LE 5 / Bluetooth mesh` [INFERRED] [semantically similar] + public/datasheets/ESP32-C2 (ESP8684).pdf → public/datasheets/ESP32-C3.pdf ## Import Cycles - None detected. @@ -126,7 +127,7 @@ - **ESP32-S31 Connectivity Ports** — public_placas_esp32_s31_rj45_ethernet_port, public_placas_esp32_s31_usb_type_a_port, public_placas_esp32_s31_usb_serial_jtag_port, public_placas_esp32_s31_usb_type_c_uart_port [INFERRED 0.85] - **Espressif ESP32 Dev Board Image Gallery** — public_placas_esp32_pinout_diagram, public_placas_esp32_s2_pinout_diagram, public_placas_esp32_s3_pinout_diagram, public_placas_esp32_s31_board_photo [INFERRED 0.85] -## Communities (77 total, 24 thin omitted) +## Communities (78 total, 25 thin omitted) ### Community 1 - "ESP32 Original SoC Silicon" Cohesion: 0.06 @@ -138,7 +139,7 @@ Nodes (31): ESP32 CP2102 USB-UART Bridge, ESP32 EN and Boot Buttons, ESP32 Micro ### Community 3 - "Layout and Marketplace API" Cohesion: 0.09 -Nodes (23): @emotion/react, @emotion/styled, framer-motion, googleapis, lucide-react, @mui/icons-material, @mui/material, next (+15 more) +Nodes (23): @emotion/react, @emotion/styled, framer-motion, googleapis, dependencies, @emotion/react, @emotion/styled, framer-motion (+15 more) ### Community 4 - "ESP32-C2 DevKit and Branding" Cohesion: 0.10 @@ -168,10 +169,6 @@ Nodes (18): APM and TEE Controller, ECDSA Accelerator, ESP32-C5 Series, Event Ta Cohesion: 0.11 Nodes (18): TEE Controller and Access Permission Management (APM), ESP32-H2 SoC, Event Task Matrix (ETM), Flash Encryption, General DMA Controller (GDMA), 2 MB or 4 MB In-Package Flash, LP Memory 4 KB, Motor Control PWM (MCPWM) (+10 more) -### Community 11 - "ESPDocs Site Content Pillars" -Cohesion: 0.12 -Nodes (15): Google Site Verification Token, 👤 Autor, Configuração do Marketplace (Opcional), 🤝 Contribuindo, 🚀 Deploy on Vercel, ⚠️ Disclaimer, ESPDocs - Documentação ESP32 em Português, 📁 Estrutura do Projeto (+7 more) - ### Community 12 - "ESP32-C6 Silicon Subsystems" Cohesion: 0.12 Nodes (17): Wi-Fi 6 (IEEE 802.11ax, 2.4 GHz), 4096-bit eFuse Memory, ESP32-C6 SoC, Event Task Matrix (ETM), General DMA Controller (GDMA), HP SRAM 512 KB, LP RISC-V 32-bit Processor (20 MHz), LP SRAM 16 KB (+9 more) @@ -244,6 +241,10 @@ Nodes (3): RISC-V 32-bit Single-Core Processor (160 MHz), HP RISC-V 32-bit Proce Cohesion: 0.67 Nodes (3): Secure Boot, Secure Boot, Secure Boot +### Community 31 - "ESP-NN Code Example" +Cohesion: 0.13 +Nodes (14): 👤 Autor, Configuração do Marketplace (Opcional), 🤝 Contribuindo, 🚀 Deploy on Vercel, ⚠️ Disclaimer, ESPDocs - Documentação ESP32 em Português, 📁 Estrutura do Projeto, Executar em Desenvolvimento (+6 more) + ### Community 35 - "TEE and Permission Control" Cohesion: 0.40 Nodes (3): inter, metadata, outfit @@ -260,20 +261,14 @@ Nodes (3): getOptionIcon(), iconMap, Seletor() Cohesion: 0.67 Nodes (3): ConnectionsDiagram(), FILTER_CATEGORIES, type_colors -## Ambiguous Edges - Review These -- `ESPDocs - Documentação ESP32 em Português` → `Google Site Verification Token` [AMBIGUOUS] - public/google21a790a2c23c0ec5.html · relation: conceptually_related_to - ## Knowledge Gaps - **225 isolated node(s):** `categoryIcons`, `metadata`, `outfit`, `inter`, `metadata` (+220 more) These have ≤1 connection - possible missing edges or undocumented components. -- **24 thin communities (<3 nodes) omitted from report** — run `graphify query` to explore isolated nodes. +- **25 thin communities (<3 nodes) omitted from report** — run `graphify query` to explore isolated nodes. ## Suggested Questions _Questions this graph is uniquely positioned to answer:_ -- **What is the exact relationship between `ESPDocs - Documentação ESP32 em Português` and `Google Site Verification Token`?** - _Edge tagged AMBIGUOUS (relation: conceptually_related_to) - confidence is low._ - **Why does `ESP32-S3 Series SoC` connect `ESP32-S3 Silicon Subsystems` to `ESP32-P4 Silicon Subsystems`, `ESP32-S2 Silicon Subsystems`, `Classic Wi-Fi and BLE Radios`, `CPU Cores and SIMD Extensions`, `Secure Boot (RISC-V Family)`?** _High betweenness centrality (0.014) - this node is a cross-community bridge._ - **Why does `ESP32-C6 SoC` connect `ESP32-C6 Silicon Subsystems` to `ESP32-C61 Silicon Subsystems`, `ESP32-H2 Silicon Subsystems`, `Crypto Accelerators (AES, SHA, RSA, ECC, HMAC, RNG)`, `802.15.4 Thread and Zigbee`, `Bluetooth LE 5.3 Variants`, `RISC-V Core Clock Variants`?** @@ -285,4 +280,6 @@ _Questions this graph is uniquely positioned to answer:_ - **Are the 2 inferred relationships involving `ESP32-S3 Series SoC` (e.g. with `ESP32-P4 Series SoC` and `ESP32-S2 Series SoC`) actually correct?** _`ESP32-S3 Series SoC` has 2 INFERRED edges - model-reasoned connections that need verification._ - **What connects `categoryIcons`, `metadata`, `outfit` to the rest of the system?** - _225 weakly-connected nodes found - possible documentation gaps or missing edges._ \ No newline at end of file + _225 weakly-connected nodes found - possible documentation gaps or missing edges._ +- **Should `ESP32 Original SoC Silicon` be split into smaller, more focused modules?** + _Cohesion score 0.06086956521739131 - nodes in this community are weakly interconnected._ \ No newline at end of file diff --git a/graphify-out/cache/stat-index.json b/graphify-out/cache/stat-index.json index 6eebfc4..7ad02f5 100644 --- a/graphify-out/cache/stat-index.json +++ b/graphify-out/cache/stat-index.json @@ -1 +1 @@ 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